The semiconductor integrated circuit (IC) industry has experienced exponential growth in recent year. Technological advances in IC design and material have produced generations of ICs where each generation has smaller and more complex circuits than previous generations. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometric size (i.e., the smallest component (or line) that can be fabricated) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs.
Integrated circuits are formed on semiconductor wafers. The semiconductor wafers are then sawed into chips. The formation of integrated circuits includes many process steps such as deposition, chemical mechanical polish (CMP), plating, and the like. Accordingly, wafers are transported between different equipment.
There are challenges in fabricating an advanced integrated circuit (IC) involving thinning a wafer.